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STV2110A
PAL-SECAM LUMA-CHROMA & DEFLECTION PROCESSOR
PRELIMINARY DATA
s s s
s
s
s
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RGB AND FAST BLANKING INPUTS AUTOMATIC CUT-OFF CONTROL DC-CONTROLLED BRIGHTNESS, CONTRAST AND SATURATION CERAMIC 500kHz VCO FOR LINE DEFLECTION CHROMA STANDARD AUTOMATIC IDENTIFICATION BIDIRECTIONAL I/O FOR CHROMA STANDARD PHASE-LOCKED REFERENCE OSCILLATOR USING A STANDARD 4.43MHz OSD CAPABILITY ON OUTPUTS VIDEO IDENTIFICATION GENERATOR
Used with the TDA8222, this IC permits a complete low cost solution with external output stages. It is pin compatible with STV2102 PAL only processor.
SHRINK 42 (Plastic Package) ORDER CODE : STV2110A
DESCRIPTION The STV2110A is a PAL-SECAM chroma decoder, video and H/V deflection processor for CTV. PIN CONNECTIONS
SUPPLY VOLTAGE
BLANKING INPUT GREEN CUT-OFF CAPACITOR RED OUTPUT HORIZONTAL Vcc Vcc 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22
ICAT
Vcc
CATHODECURRENT
SUPPLY VOLTAGE INPUT BLUE INPUT GREEN INPUT RED CUT-OFF CAPACITOR
BLK
COG ROUT HVcc GOUT BOUT COB
BIN
GIN COR RIN BRIG FBL
GREEN OUTPUT
BLUE OUTPUT BLUE CUT-OFF CAPACITOR LUMINANCE SIGNAL INPUT SCANNING LOOP FILTER SCANNING XTAL
RED INPUT
BRIGHTNESS CONTROL FAST BLANKING INPUT
YIN SLPF SXTL
CLPF CHROMA LOOP FILTER CXTL CHROMA XTAL
CKP
F425
PAL KILLER CAPACITOR
COMPOSITE VIDEO SIGNAL CVBS
LINE FLYBACK INPUT VERTICAL OUTPUT HORIZONTAL OUTPUT CONTRAST CONTROL LFB VOUT HOUT CTR
4.25MHz FILTER
ACC CONTROL CAPACITOR RED DEEMPHASIS CAPACITOR 4.40MHz FILTER SATURATION CONTROL
ACC
CDR F440
SAT CDB
F432 GND
SECAM CHROMA INPUT SECIN
PAL CHROMA INPUT PALIN GROUND DELAY CHROMA INPUT CHROMA STANDARD I/O GND DLI
BLUE DEEMPHASIS CAPACITOR
4.32MHz FILTER GROUND SECAM KILLER CAPACITOR CHROMA OUTPUT
2110A-01.EPS
CKS
DLO
PS
September 1993
This is advance information on a new product now in development or undergoing evaluation. Details are subject to change without no tice.
1/15
2/15
SAT RIN BRIG
36 37 40 16 39
STV2110A
Vcc Vcc
27 35
HVcc
Blk. RGB
FBL GIN BIN CTR
BLOCK DIAGRAM
1
41
5
4 ROUT
Black Insertion Matrix Brightness Blanking Contrast + Clamp 6 GOUT 7 BOUT
YIN 9
Y Input Contrast
38 COR Black Reference Saturation Tube Temp Meas. RGB Cut-off Leak. Current Meas. RGB Switch 3 COG 8 COB
Clamp
42 ICAT
CXTL 33
XVCO
PAL Demod. Flip-Flop PAL Frame Sync. Separator
SECAM Demod.
Decoder
Blank. Comp.
2 BLK
CLPF 34
90deg Flip-Flop SECAM
Phase Detector
SECAM Ident.
Line Counter
Frame Output
14 VOUT
ACC 30
Permutator
Burst Detector Killer
Burst Gate Generator
Phase Comp. 2
Phase Shift
Line Output
15 HOUT
CKP 32
PALIN 18
DL Matrix Mute Standard Control
ACC
SECIN 17
Sync. Sep.
Phase Comp. 1
Divider
VCO
SAT
24 23 26
19 20
22
GND GND DLI CKS
DLO
31 F425
21
25 F432
29
PS CDB
CDR
28 F440
13
12
10
11
LFB
CVBS
SLPF
SXTL
2110A-02.EPS
STV2110A
FUNCTIONAL DESCRIPTION DEFLECTION Synchronization Separator The synchronization separator is based on the bottom of synchronization pulses alignment to an internal reference voltage. An external capacitor permits to align synchro. pulses, two external resistors determines the detection threshold of synchro pulses. The frame synchronization pulses are locked to a 32s reference signal to perfect interlacing. Horizontal Scanning The horizontal scanning frequency is obtained from a 500kHz VCO. The circuit uses two phase-locked loops (PLL). The first one controls the frequency; the second one, fully integrated, controls the relative phase of the synchronization and the line flyback signals. The first PLL has two times constants : a long time constant during the picture to have a good noise immunity, a short time constant at the beginning of the frame to recapture faster the phase in case of VCR video signal. More over, the PLL is in short time constant three lines before frame pulses occured, it permits to ensure good interlacing when the video signal comes from a VCR tape with high phase error. The horizontal output signal is 28s width. On starting up, horizontal pulses are enabled at VCC = 6.8V. On shutting down, horizontal pulses are inhibited for VCC = 6.2V. Vertical Scanning The windows for the frame sync detection are generated by a count down system. The selection of the windows is determined by the IC status : - video identification off - window : 248/314 - video identification on - window : 248/352 When a sync pulse is detected inside the window a 10.5 lines long pulse is provided to VOUT pin. The count down system provides also the needed signals for the time constant switch, the line PLL inhibition and service signals to the rest of the IC. CHROMA ACC Amplifier, DL Matrix, Permutator and Demodulator The correct chroma subcarrier input, issued from bandpassor bell filter, is internally selected with the standard. The ACC amplifier envolves three stages : the first one select the correct input, the second one the -6dB in picture (PAL mode), the third one is controled by the ACC voltage. The dynamic range is over than 30dB. The chrominance output signal is fed to the delay line. - PAL mode : the adding and substracting direct and delayed signals are performed by the DL matrix function. Two synchronous demodulators multiplies the (B-Y) signal with the 0 degree phase 4.43MHz reference signal and the (R-Y) signal with the alternate 90 deg. 4.43MHz phase reference signal. - SECAM mode : the permutator separatesthe two (B-Y) and (R-Y) subcarriers. These signals are demodulated by two FM demodulators with two external L, C centered on fO(blue) = 4.25MHz and fO(red) = 4.406MHz. 4.43MHz Phase Locked Loop The oscillating frequency of the 4.43MHz crystal oscillator is controlled by the output voltage of the loop filter. The phase detector will lock the 90 degree reference signal to the direct burst signal. A 90 degree phase shifter permits to recover the 0 degree reference signal. A flip-flop driven by line pulses permits to generate the alternate 90 degree signal. ACC Control and Color Killer PAL mode : the direct burst signal is demodulated with the 90 degree reference signal. The demodulation result is used by ACC control and killer function. SECAM mode : ACC control is done by a X2 demodulator. For identification the burst signals of the red and blue lines are demodulated by the external LC connected on Pin 31, it is centered at 4.32MHz. This give positive and negative signals which are inverted by the signal coming out of the SECAM flip-flop. In both standard, if the demodulation result is always positive, the killer capacitor is charged and the standard is identified (color ON). When demodulation result is always negative, the killer capacitor voltage reaches the flip-flop inhibition level, so the alternace sequence is reversed and the capacitor is charged again. In case of no video signal, both killer capacitors voltage are maintained about VCC/2, below the color off threshold. In PAL or SECAM, the ACC control voltage is obtained by the peak detection of the demodulated burst.
3/15
STV2110A
Automatic Standard Identification The circuit is alternatelyforced in eachmode during two fields (PAL mode, SECAM mode disabled or SECAM mode, PAL mode disabled). If PALsignal is identified, the alternate PAL/SECAM sequency is locked in PAL mode. To have a SECAM identification, the circuit must memorizes a first SECAM identification, than test the PAL mode and confirm a second SECAM identification. The SECAM identification will take from four to six fields. Output Pin 21, named PS, is high level in PAL mode and low level in SECAM mode. Forced standard : Pin 21 can be used for the purpose : - Pin 21 to HVCC : PAL mode - Pin 21 to ground : SECAM mode VIDEO Input Stage The luminance input is controlled by the contrast control stage which range is 20dB. The luminance and color difference signals are added in the video matrix circuit to obtain the color signals. ABSOLUTE MAXIMUM RATINGS
Symbol HV cc Vcc H OUT Tstg Toper Parameter Horizontal Supply Voltage (Pin 5) Video & Chroma Supply Voltage (Pins 1-41) Horizontal Output (Pin 15) Storage Temperature Operating Temperature Value 12 HV CC + 0.5 12 -55, +150 0, +70 Unit V V
o o
The color signals are sent to an RGB switch which will drive to the outputs either internal RGB signals or external RGB signals. Automatic Cut-off Control The black levels of the RGB outputs are controlled with the cut-off loops during three line periods after the frame retrace. The cut-off measurements are sequentially achieved during these three lines. The leakage current measurement is achieved during the frame retrace and memorized on an internal capacitor, thus the circuit is able to extract the cut-off current from the total current measurement. Warm-up Detector At the start-up, the cut-off loops are switch off, a white level is inserted on the luminance signal until a cathode current is detected. Then the cut-off loops are released. RGB Inputs To avoid the black level of the inserted signal differing from the black level of the normal video signal, the external RGB are clamped to the black level of the luminance signal. Therefore, an AC coupling is required for the RGB inputs. The RGB inputs are controlled by a 12dB range contrast control stage.
C C
THERMAL DATA
Symbol R th (j-a) Parameter Junction-ambient Thermal Resistance Max. Value 60 Unit
o
C/W
DC AND AC ELECTRICAL CHARACTERISTICS (HVCC = VCC = 9V, Tamb = 25oC unless otherwise specified)
Symbol HV cc Vcc Icch Iccv&c PD Parameter Scanning Supply Voltage (Pin 5) Video & Chroma Supply Voltage (Pins 1-41) Scanning Supply Current (pin 5) Video & Chroma Supply Current (Pins 1-41) Total Power Dissipation No load No load No load Test Conditions Min. 8.1 8.1 Typ. 9 9 25 45 630 Max. 9.9 9.9 35 55 890 Unit V V mA mW
2110A-03.TBL
mA
4/15
2110A-02.TBL
2110A-01.TBL
V
STV2110A
DC AND AC ELECTRICAL CHARACTERISTICS (continued) (HVCC = VCC = 9V, Tamb = 25oC unless otherwise specified)
Symbol LUMINANCE INPUT (Pin 9) VBW9 VDC9 Ig G9 BW467 Input Voltage DC Level Input Current Luma Gain Bandwidth (Y to R, G, B outputs) -3dB No input signal * During burst period * Out of burst period 350 2.6 150 1 7.4 6 MHz 490 mVPP V A A Parameter Test Conditions Min. Typ. Max. Unit
CONTRAST CONTROL (Pin 16) V16 V16 (Max.) G16 I16 V36 V36 (Max.) I36 V27 V27 (Max.) G27 V27M I27 VBW 4-6-7 Contrast Control Voltage Allowed Control Voltage Contrast Control Range Input Current 20 10 2 to 4 5 V V dB A V 5 10 V A V 5 -50 0.5 10 * 0.35V B to W @ Pin 9 * Contrast @ 4V * Sat. & Brig. @ 3V V dB V A V
BRIGHTNESS CONTROL (Pin 36) Brightness Control Voltage Allowed Control Voltage Input Current 1.8 to 4.3
SATURATION CONTROL INPUT (Pin 27) Saturation Control Voltage Allowed Control Voltage Saturation Control Range Mute Level Input Current 2 to 4
RGB OUTPUTS (Pins 4-6-7) Output Signal Amplitude (black to white) Individual Output Sinking Current Maximum Peak White Level Blanking Level Minimum Level of Inserted Cut-off Lines Maximum Level of Inserted Cut-off Lines Relative Variation in Black Level with Various CONT. SAT. BRIG between the 3 channels Vtemp Black Level Thermal Drift Tracking between Luminance and Chrominance Signals over 10dB Contrast Control RGB INPUTS (Pins 37-39-40) VBW37-39-40 Input Amplitude (B to W) Vclamp 37-39-40 I37-39-40 Ii37-39-40 GCTR G37-39-40 Clamp Level Control Current Leakage Current -3dB 8 14 3.7 RGB Contrast Control Range RGB Gain Contrast max 0.7 1.8 150 1 2 V V A A dB
2110A-04.TBL
2.6
I4-6-7 VM4-6-7 Vblank 4-6-7 VCO min. VCO max.
2 7.8 0.5 2.5 4.5 20 0.5 2
mA V V V V mV mV/ C dB
o
BW 37-39-40 Bandwidth
MHz
5/15
STV2110A
DC AND AC ELECTRICAL CHARACTERISTICS (continued) (HVCC = VCC = 9V, Tamb = 25oC unless otherwise specified)
Symbol Parameter Test Conditions Min. Typ. Max. Unit FAST BLANKING INPUT (Pin 35) VTH1-35 VTH2-35 Tswitch Tblank VREF42 VREF42 I42 Vsb42 First Threshold (switching) Second Threshold (blanking) Switching Delay Blanking Delay 0.7 2.1 50 100 V V ns ns
CATHODE CURRENT INPUT (Pin 42) Leakage Current Reference Voltage CO Reference refered to Leakage Current Reference Output Current Start-beam Current Detection Reference Voltage 150 2.4 1.75 250 V mV A V
AUTOMATIC CUT-OFF (Pin 3-8-38) Cut-off Capacitor Clamping Current PAL CHROMINANCE INPUT (Pin 18) V18 Vburst-18 GACC R18 VDC-18 V17 Vburst-17 R17 VDC-17 I30 Ii30 I34 CR33 Vburst-22 VOFF-32 VON-32 VINH-32 I32 Vnom-32 Input Level Minimum Burst Signal Amplitude within the ACC Control Range ACC Control Range Input Impedance DC Level No input signal Change of burst over whole ACC Control Range < 1dB 0.3 30 30 8 3.5 1.0 VPP mVPP dB k V 100 A
SECAM CHROMINANCE INPUT (Pin 17) Input Level Minimum Burst Signal Amplitude within the ACC Control Range Input Impedance DC Level No input signal 0.3 30 20 3.5 1.0 VPP mVPP k V A 1 A A Hz
ACC CAPACITOR (Pin 30) Charging Current Leakage Current During burst gate period Out of burst gate period 250
PLL LOOP FILTER (Pin 34) Control Current 400 700 Within ACC Control Range 2
CHROMAXTAL (Pin 33) Catching Range
SUBCARRIER OUTPUT (Pin 22) Output Burst Amplitude (PAL mode) Vpp
PAL KILLER CAPACITOR (Pin 32) Color off Threshold Color on Threshold PAL Flip-flop Inhibition Level Control Current Voltage with Nominal Input Signal 5.0 5.4 3.2 250 6.0 V V A V
2110A-05.TBL
V
6/15
STV2110A
DC AND AC ELECTRICAL CHARACTERISTICS (continued) (HVCC = VCC = 9V, Tamb = 25oC unless otherwise specified)
Symbol Parameter Test Conditions Min. Typ. Max. Unit SECAM KILLER CAPACITOR (Pin 23) VOFF-23 VON-23 VINH-23 I23 Vnom-23 Color off Threshold Color on Threshold SECAM Flip-flop Inhibition Level Control Current Voltage with Nominal input Signal 5.6 6 3.2 250 7.3 V V V A V
DELAYED CHANNEL INPUT (Pin 20) VDC-20 R20 DC Level Input Impedance No input Signal PAL standard SECAM standard 2.2 8 20 V k k
4.25MHz AND 4.40MHz FILTER (Pins 28-31) VDC-28-31 R28-31 DC Level Input Impedance No input signal 2.3 20 V k
RED AND BLUE DEEMPHASIS CAPACITORS (Pins 26-29) VDC-26-29 R26-29 DC Level Input Impedance No input signal 6.4 6 V k
4.32MHz FILTER (Pin 25) VDC-25 R25 DC Level Input Impedance No input signal 3.5 40 V k
FORCING/STANDARD IDENTIFICATION (Pin 21) Max.Current on PS Output DC Output Voltage DC input Voltage COMPOSITE VIDEO BASE BAND SIGNAL (Pin 12) VREF-12 V12 I12 Clamp Voltage Video Input Signal (sync to white) Sync Threshold I12 = - 1A 1.6 1.85 1 12 2.1 V VPP A PAL SECAM PAL SECAM PAL SECAM +5 -5 7.5 1.5 HV CC 0.0 mA mA V V V V
SCANNING XTAL (Pin 11) F 11 CR11 Frequency after Divider Frequency Control Range after Divider 15.625 700 kHz Hz
PLL LOOP FILTER (Pin 10) Iiow-10 Ihigh-10 Output Current Output Current Long time constant Short time constant 0.15 0.40 mA mA
DELAYED LINE FLYBACK INPUT (Pin 13) V13 I13 Allowed Voltage Range Input Current V13 < 0.6V - 0.4 HVCC 5 V A
2110A-06.TBL
VTH-13
Threshold
0.6
V
7/15
STV2110A
DC AND AC ELECTRICAL CHARACTERISTICS (continued) (HVCC = VCC = 9V, Tamb = 25oC unless otherwise specified)
Symbol Parameter Test Conditions Min. Typ. Max. Unit DIRECT BLANKING INPUT (Pin 2) VTH-2 V2 I2 T 15 Vlow-15 V5 start V5 stop t15 T 14 Tsync1 Vlow-14 Threshold Allowed Voltage Range Input Current V2 < 0.6V 26 I15 = 10mA 28 1.5 6.8 6.2 12 - 0.4 0.6 HV CC 5 V V A s V V V s line line V
HORIZONTAL OUTPUT (Pin 15) Output Pulse Width Output Voltage (open collector) HVCC Start Threshold HVCC Stop Threshold 2 Phase Range Output Pulse Width Frame Synchro. Window (search) Output Voltage (open collector) 29
VERTICAL OUTPUT (Pin 14) 248 to 352 1
2110A-07.TBL
10.5
Figure 1 :
100%
Contrast Control Curve
Figure 2 :
100%
Saturation Control Curve
RGB Output Signal
RGB Output Signal
50%
50%
2110A-03.EPS
0% 2 3 4 5
0% 2 3 4 5
Figure 3 :
Difference between Black Level and measuring Level at RGB Outputs as a function of the Brightness Control Input
2V
V
1V
0V V36 (V) -1V 2
8/15
2110A-05.RPS
3
4
5
2110A-04.EPS
V16 (V)
V 27 (V)
STV2110A
Figure 4 : Pins 3-8-38-42 (COG, COB, COR, ICAT)
3-8-38
42
Figure 5 : Pins 37-39-40 (RIN, GIN, BIN)
Figure 6 : Pins 4-6-7 (ROUT, GOUT, BOUT)
4-6-7 37-39-40
Figure 7 : Pin 9 (YIN)
2110A-07.EPS
Figure 8 : Pin 10 (SLPF)
10
9
2110A-09.EPS
9/15
2110A-10.EPS
2110A-08.EPS
2110A-06.EPS
STV2110A
Figure 9 : Pin 11 (SXTL) Figure 10 : Pin 12 (CVBS)
V REF
11
2110A-11.EPS
12
2110A-12.EPS
Figure 11 : Pins 2-13 (BLK, LFB)
Figure 12 : Pins 14 (VOUT)
14
2-13
2110A-13.EPS
Figure 13 : Pin 15 (HOUT)
Figure 14 : Pins 16-27 (CTR, SAT)
15
16-27
2110A-15.EPS 2110A-16.EPS
Mute (Pin 27)
10/15
2110A-14.EPS
STV2110A
Figure 15 : Pin 20 (DLI)
20
V REF1
V REF2
IPAL
ISEC
Figure 16 : Pin 21 (PS)
Figure 17 : Pin 25 (F432)
V REF
25
21
2110A-18.EPS
11/15
2110A-19.EPS
2110A-17.EPS
STV2110A
Figure 18 : Pins 17-18 (SECIN, PALIN)
V REF2
Figure 19 : Pins 28-31 (F440, F425)
17 18
28 31
V REF
V REF
2110A-20.EPS
Figure 20 : Pins 26-29 (CDB, CDR)
Figure 21 : Pins 23-32 (CKS, CKP)
V REF
26 29
2110A-22.EPS 2110A-23.EPS 2110A-25.EPS
23-32
Figure 22 : Pin 22 (DLO)
Figure 23 : Pin 36 (BRIG)
36
12/15
2110A-24.EPS
22
2110A-21.EPS
STV2110A
Figure 24 : Pin 30 (ACC)
IPAL ISEC
30
Figure 25 : Pin 33 (CXTL)
Figure 26 : Pin 34 (CLPF)
Base Current Compensation
Phase Comparator
33
34
2110A-27.EPS
Figure 27 : Pin 35 (FBL)
13/15
2110A-29.EPS
35
2110A-28.EPS
2110A-26.EPS
100
100F 22nF
HVc c 15k
75
9V
47k
2 x 1N4148
GND GND 10nF 10nF 390
DL
20 DLI
28 26 29 F440 CDB CDR 180pF 180pF 10nF
10H
31 F425 10nF
25 13 LFB F432 10nF
2 BLK
560k
680
14/15
Vcc
39k
STV2110A
FBL Vcc SAT 22nF 100nF CTR
22k
Vcc
39k 22k
HVcc RIN
39k
9V
100F BRIG
22k 15k
GIN
BIN
ICAT
Vcc
75 75
75 100nF 100nF 100nF
APPLICATION DIAGRAM
100nF
15k
MUTE
Vcc 1 41 5 27
470
FBL 35 SAT ROUT
470
100nF 1k 22nF 22nF 22nF CTR COR COG COB ICAT RIN GIN BIN 37 40 42 38 3 8 16 39 BRIG 36
1k
10nF YIN 9 33 4 6 CLPF 34 30 32 23 18
1.2k 470
CVBS CXTL
DL & TRAP
VCC
1k
4.43MHz
18k
270k
GOUT BOUT H VCC
1.2k
7
100nF
CKP CKS
4.7nF
330k
33nF ACC
47nF
6.8nF
VOUT
RAMP GENERATOR (TDA1771) 14 H VCC +V
390
VERTICAL DEFLECTION
1k
10nF PALIN SECIN 17
STV2110A
CVBS
120pF
10H
10nF
15 11 PS 21 10 DLO 22 24 19 12
HOUT SXTL 47nF
2k
CVBS
1k
503kHz SLPF CVBS 100nF 3.9k
330pF
10H
LINE YOKE H VCC
3.3nF
56pF CVBS
5.6k 2Vpp
1 F
18k
22k
100pF
1k
1k
150pF 100pF
1k 10H
10k 10H
4.7nF
1k
750
8.2H
10H
2110A-30.EPS
STV2110A
PACKAGE MECHANICAL DATA 42 PINS - PLASTIC SHRINK DIP
e4 F
a1
A
I
b2
b e3
e
L
b1
Stand-off
E
D
42
22
1
21
Dimensions A a1 b b1 b2 b3 D E e e3 e4 F i L
Min. 3.30
Millimeters Typ. 0.51 0.35 0.20 0.75 0.75 15.57
Max.
Min. 0.130
Inches Typ. 0.020 0.014 0.008 0.030 0.030 0.613
Max.
0.59 0.36 1.42 39.12 17.35 0.070 1.400 0.600
0.023 0.014 0.056 1.540 0.683
1.778 35.56 15.24 14.48 5.08 2.54
0.100
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No licence is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectronics. 1994 SGS-THOMSON Microelectronics - All Rights Reserved Purchase of I2C Components of SGS-THOMSON Microelectronics, conveys a license under the Philips I2C Patent. Rights to use these components in a I2C system, is granted provided that the system conforms to the I2C Standard Specifications as defined by Philips. SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A.
15/15
SDIP42.TBL
0.570 0.200
PMSDIP42.EPS

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